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SSP 100mm/1000um >10000Ω.cm N<100> Silicon wafer
$25≥50 Piece/Pieces
Payment Type:
L/C,T/T,D/P,Paypal
Incoterm:
FOB,CFR,CIF,EXW
Min. Order:
50 Piece/Pieces
Transportation:
Air
Sample: $50.00 /Piece/Pieces, 10 Piece/Pieces...Buy Sample
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Product Description
Overview
Product Attributes

Model No.: ZLY284

Brand: Zoolied

place of origin: China

Type/Dopant: P/B Or N/Ph Or Intrinsic

TTV&Bow: Spesified By Customer

Diameter: 1" 2" 3" 4" 6" 8" 12"

Thickness: 0.1-2.0mm

Growth: Fz/Cz

orientation: <100><110><111>

Resistivity: 0.01~10,000 Ohm-Cm

Surface Finish: Ssp Or Dsp

Warp: Spesified By Customer

particles: Spesified By Customer

Supply Ability & Additional Information

Packaging: Standard

Productivity: 9999999999

Transportation: Air

Place of Origin: Changchun

Supply Ability: 9999999999pcs/year

Certificate: ISO

HS Code: 3801010

Payment Type: L/C,T/T,D/P,Paypal

Incoterm: FOB,CFR,CIF,EXW

Packaging & Delivery
Selling Units:
Piece/Pieces
Single package size:
20cm*20cm*20cm
Single gross weight:
1kg
Package Type:
Standard
Picture Example:

Zoolied provides SOI (Silicon on Insulator). SOI wafers use silicon-insulator-silicon substrates for specific applications where reducing parasitic capacitance of devices is critical. Many photonic devices also use SOI wafers to make thin silicon optical channels, integrated heaters, and other optical devices. They are also used in MEMS production, where thin Si layers are patterned and etched, and the underlying insulator layer is removed by selective etching to leave independent features. These applications include strain gauges, resonant cantilevers for AFM and molecular scale manipulators, and microfluidic devices.

The following are the parameters of the SOI chip.
1. Device thickness
This is the thickness of the top layer of silicon, usually in microns.
2. Growth method
This is listed twice in the SOI wafer. The first is the growth method of the device layer, which can be CZ or FZ.
3. Device resistivity
Measured with a standard silicon wafer, this is the resistivity of the top silicon layer in Ohm-cm.
4. Box
This is the thickness of the insulator or "buried oxide" layer, so it is BOx. As with all thicknesses, it is usually µm, but it can also be nm or Å.
5. Handle thickness
The thickness of the silicon bottom layer, usually in µm.
6. Growth method
The second list of growth methods involves the silicon processing layer.
7. Dealing with resistivity
Measured with a standard silicon wafer, this is the resistivity of the silicon bottom layer in Ohm-cm
8. Back
This is related to the processing method of the back side of the processing layer, which can be various finishes, including: polishing, etching, oxidation, non-oxidation and laser marking.


Zoolied offers a variety of optical Glass Wafers, such as Dummy Silicon WafersJgs1 Wafers, and K9 Wafers, and Bk7 Wafers. ZOOLIED provides multiple anti-reflection coating options and also provides uncoated optical glass wafers. Looking for ideal optical si wafers and Ge Wafers Manufacturer & supplier? We have a wide selection at great prices to help you get creative. All the optical glass wafers are quality guaranteed. Zoolied is China Origin Factory of optical Wafers. If you have any question, please feel free to contact us.

Note: Please pay attention to your email at any time after inquiring, we will send you the quotation by email.

Zoolied Standard Silicon Wafer
Diameter 2" 3" 4" 5" 6" 8" 12"
Grade Prime/ Test/ Dummy
Growth Method CZ/FZ
Orientation < 100 > , < 111 > , < 110 >
Type/Dopant P/Boron , N /Phos, N /As, N /Sb
Thickness (um) 279 380 525 625 675 725 775
Thickness Tolerance Standard ± 25μm
Resistivity 0.001 - 10,000ohm-cm
Surface Finished DSP,SSP
TTV (um) Standard < 10 um
Bow/Warp (um) Standard <40 um
Particle Specified by customer


Silicon wafers 1


silicon wafers2

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